simulating leakage with a silicon transistor

[MarkL]

I'm building a Tonebender Mk II project and want to stick a PNP silicon transistor in the Q2 spot.  I know I can simulate leakage by running a resistor between the B and C of the transistor, but what's a good value to do start with in doing that?      Open to any suggestions or ideas regarding the variables involved in making that choice.