What is the nature of delay time in PT2399 and BBD chips?

[brand0nized]

On a given delay circuit using either PT2399 or BBD chips, would all builds have the same max delay time with the Time knob turned all the way up? If not, how big are the differences between chips?

(Day dreaming of ways to control delay time by replacing the delay pot with arduino...)

[jimilee]

It's my understanding that longer delays on the pt2399 start distorting and are of low quality, where as the BBDs are more clear delays at longer times.

[HamSandwich]

There are several different BBD chips all with different delay times and different clock circuitry that play into the max delay time. Did you have a chip in mind?

[chromesphere]

Check the datasheets:

MN3008 - 10.24 ~ 102.4ms
MN3005 - 20.48 ~ 204.8ms
PT2399 - 342ms max (with consequentially max harmonic distortion as well (THD))

Take into account that a lot of bbd delays pcb's these days allow for the use of 2 BBD's in series, so double the above figures for the MNs

[brand0nized]

Check the datasheets:

MN3008 - 10.24 ~ 102.4ms
MN3005 - 20.48 ~ 204.8ms
PT2399 - 342ms max (with consequentially max harmonic distortion as well (THD))

Take into account that a lot of bbd delays pcb's these days allow for the use of 2 BBD's in series, so double the above figures for the MNs

So I guess my question would be if the max delay times for all MN3008 will be exactly 102.4ms.

[chromesphere]

Depends how you bias it

There is a trimmer on BBD based delays that determines delay time.  A compromise between lose of highs and delay length.

[midwayfair]

The max delay time on a PT2399 is actually much longer -- rarely less than 700ms. It just has no fidelity that high. BBD chips have poor fidelity at the longest extend of their times, as well.

So I guess my question would be if the max delay times for all MN3008 will be exactly 102.4ms.

The number of bucket brigade stages is inherent in the design of the chips, and the stages are responsible for creating the delay.

This doesn't mean that there won't be variance. You can think of a BBD chip as being something like a RAM chip. They work extremely similarly. The delay chip passes a charge along a series of internal capacitors; the next cap in line picks up the charge, and the previous one is allowed to discharge at a rate set by an external device, the clock chip. Capacitors and other components in the real world are rarely their exact stated value -- there's little reason to suspect that all 1K stages of a BBD chip would have perfect capacitance. But that's a lot of stages and you have to figure it will average out at some point. But don't expect two of anything -- chips, caps, resistors -- to be EXACTLY the same. Good design works within acceptable tolerances.

[culturejam]

They all start to sound like shit if you run them much beyond their stated maximums. That's why there is so much filtering.