JFET SRPP boost frequency response oddity

[bordonbert]

Hi guys.

I'm simulating the following SRPP stage in LTSpice with the schematic below.  The idea is to use it as a clean boost stage so driving it into clipping is not the aim. It must accept a range of input signals up to about 1V which explains the additional R9. I added this to lift the DC levels of J1 and, I would think, offer greater headroom at the input. Yes it cuts down on headroom at its drain but that I can spare. For bigger signals I can switch the rail voltage to a generated 16.5V and more than regain it. Thankfully all that seems to be what I'm seeing.



Originally I set it up without R7 and R10 in place with the input from V1 connected directly to R11. The frequency response top end was flat to way beyond the audio range. I didn't think there was anything odd in adding a divider (simulated drive control) to the input which may have allowed me to remove R9 but when I did I got the response plot below.



The top end rolloff now displays a 3dB point of 6.6kHz. Investigating a little further shows that any series resistance in that input line, adding a series parasitic resistance to V1 for example, affects the upper rolloff.

Now I can't really see any mechanism which would account for this but then I'm much more a BJT than a JFET man. Maybe the additional R9 in the source line is having an effect I did not anticipate. Can anyone explain what I am seeing here?


And if anyone can suggest why I'm having to post the thread before I can get to the link location for the images which then have to be "modified" into place I would appreciate it.  Using Firefox, is it an "eccentricity"?

[midwayfair]

First, you're loading the simulated pickup more with your new gain control, unless your simulation is assuming a buffered input voltage source instead of a guitar pickup. I don't know if that's part of your simulation, but you have (1M||1M||470K) as your input impedance.

Second, you've increased the gain by removing R9. I don't know if it's true in this arrangement, but usually increasing the gain drops the input impedance -- which, again, will load your input voltage unless you've simulated a buffered input instead of a pickup.

Regardless of what the actual mechanism is, in real life, this circuit will have noticeable top end loss at maximum gain. You could correct some of the behavior you're seeing by adding a source bypass capacitor. 22nF would be about right. (The Tube version also needs a source bypass capacitor to affect the output impedance: http://www.valvewizard.co.uk/SRPP_Blencowe.pdf)

You can also decrease C2.

Just a suggestion, but if you need more input headroom, use a 2N5457 instead of the J201s. You can still get absolutely absurd levels of amplification but you'll be able to accept input voltages up to about 1.5V instead of the J201's .7V.

You also probably want to increase R8 to raise the input impedance.

[bordonbert]

Hi Midway.  The circuit simulated was in no way a fully finalised version.  You've pointed out some very valid points, not all of which I had picked up on, but some of them were to be addressed once I understood more fully some of the subtleties of how to control this configuration properly.  As you are aware it's nowhere near as simple a circuit as it is often assumed to be.  In fact I was surprised to find that, if you look into it, there are still ongoing arguments as to how it really works!

Incidentally, the problem of the top end fall off may have been largely solved.  I think it's mostly simple Miller capacitance in J1.  If you do the sums you find that with roughly 100k source impedance at the gate of J1 a capacitance of about 240pF is needed to rolloff at 6.6kHz and with a gain of about 10x that means in the region of 24pF Cgd which seems a bit high but in the ballpark.  That alone suggested it might be good to buffer it with a simple source follower and the sims of that are flat again.  It means a lower impedance drive control can be inserted after the follower to keep signals below clipping which seems to work.  That offers better control of input impedance as seen by the pickup, and with constant voltage biasing to half V++ we get terrific input headroom.

R9 seemed to be a good addition to me.  It is true that it reduces gain but we have that to spare, and it also increases input range dramatically.  I trimmed it so that it could cope with higher voltages without even needing the drive control.  With a drive control in place it will be possible to play with reducing or even removing it.  Input impedance of that stage was something I had not really considered yet as the other problems were more pressing but your point is well taken.  And your later suggestion regarding JFET choice is relevant here too.

Decreasing C2 was originally tried and rejected.  That value was settled on as a good compromise for flat response.  It affects the bottom end rolloff and in fact can put it well into the frequency range of choice.  That might be good to keep an overdrive pedal from muddying up but in a clean boost I wanted to start with it set as just that, to all intents and purposes flat across the board.  I was hoping to find that in reality I would have leeway to reduce it to 1uF as an easily accessible cheap non-polarised value.  What you say from your hands on knowledge suggests that is going to be on the cards.  That's a plus!

I'll try the 2N5457 in there too, I have 100 or so of them around.  I just hadn't thought of it.  You know my penchant for circuitry where the component choice is not critical?    Well that does leave me vulnerable to missing this point of course.  In my efforts to make it work fairly independent of the gain of the JFET it just didn't occur to me to try the alternative type.  I do accept JFETs are a very different beast to BJTs in this respect so the type stipulated is important.  However, once I've decided on that type it should be possible to set up a circuit which in the main does not require selecting individual suitable examples or trimming with pots.  You may have a range of gains but a drive control largely takes care of that aspect in a clean boost.  Higher gain implementation, just turn the signal down after the input buffer.  And the SRPP/mu-amp approach means you don't have those God-awful trimmers required to set the DC point to midway - absolutely shocking,         the DC point is largely set by the divider you reference your upper grid to.

I'll also look at values of R8.  I chose it basically because it is the value usually seen in other implementations of the SRPP/mu-amp.  I just hadn't thought to go above this level, but I'll give it a whirl and see what happens when I do.

I really do appreciate your time and thoughts on this, I've got a few more things to catch up on now.  More sleepless nights at the keyboard and bench!  Many thanks for that.