I just edited my original post. I meant 5x not 50x. I was thinking of 50mv. lol
There was a model for the ideal 2N5952 in Tina so I used that. I found the voltage at its base 130ish Hz notch and adjusted the gate until the notch began to move and then used that as a starting point. I then gradually changed the voltage until the notch was up at 2khz and that was about 250-300mv, which is the swing voltage from the LFO that reaches the gates. I then just replaced the jfet with a j113 in the sim and did the same. It was about 50mv of difference on the gate to produce the same effect. So I reduced the R and C impedances to a 1/5 of what they were in the sim and it was pretty close. then I just translated that to the components on the board.
I don't have the vgsoff for the j113s I'm using no, but I used the op amp jfet matching circuit that is available, and they are all about 0.95v gs to produce a 10k resistance.
There was a model for the ideal 2N5952 in Tina so I used that. I found the voltage at its base 130ish Hz notch and adjusted the gate until the notch began to move and then used that as a starting point. I then gradually changed the voltage until the notch was up at 2khz and that was about 250-300mv, which is the swing voltage from the LFO that reaches the gates. I then just replaced the jfet with a j113 in the sim and did the same. It was about 50mv of difference on the gate to produce the same effect. So I reduced the R and C impedances to a 1/5 of what they were in the sim and it was pretty close. then I just translated that to the components on the board.
I don't have the vgsoff for the j113s I'm using no, but I used the op amp jfet matching circuit that is available, and they are all about 0.95v gs to produce a 10k resistance.